1) Field of the Invention
This invention relates generally to the fabrication of flash memory devices and in particular to an electrically erasable programmable read only memory (EEPROM) array that is based on a MONOS split gate cell (a stacked gate transistor and a MONOS transistor).
2) Description of the Prior Art
A semiconductor nonvolatile storage element in which data is electrically rewritable is called as an EEPROM. The EEPROM has many types and comprise typically a MONOS memory and a MNOS memory and a floating gate.
The MONOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Oxide Nitride-Oxide Semiconductor in a cross section whole the MNOS memory is a semiconductor nonvolatile storage element having the structure of Metal-Nitride-Oxide-Semiconductor in cross section.
The MONOS memory has lately attracted considerable attention because it has a high reliability and data is rewritable therein many times. However, MONOS technology has not been successfully integrated into multi-level memory devices.
U.S. Pat. No. 5,293,560(Harari) shows a multi-state flash EEPROM system using incremental programming and erasing methods. U.S. Pat. No. 5,515,321(Hazama) shows a method of reading data in a memory capable of storing three or multi-valued data in one memory cell. U.S. Pat. No. 5,496,753(Sakarai) shows a storage device having a MONOS structure. U.S. Pat. No. 5,480,821 (Chang) shows a method of fabricating a split-gate flash EEROM array. Also, an IEEE article titled "A 1-Mb EEPROM With A MONOS Memory Cell For A Semiconductor Disk Application", IEEE Journal of Solid State circuits, Vol. 26, No 4, April (1991) p. 498.) describes a MONOS memory cell and operation.